Senior Physical Design Engineer

2 days ago

Ho Chi Minh City, Ho Chi Minh, Vietnam TopMatch Jobs Full time

Work Location:


• HCM: District 1


• Da Nang: Hai Chau District

1. Job Description


• Execute and own full Physical Design (PD) flow: Floorplanning → Placement →

CTS → Routing → STA → Physical Verification (DRC/LVS/EM/IR)


• Work on block-level or chip-level PnR for SoC/ASIC designs.


• Analyze and resolve timing challenges (setup/hold), congestion, power issues, IR

drop, EM.


• Optimize PPA (Performance – Power – Area) throughout design stages.


• Collaborate closely with RTL, Verification, DFT, and Architecture teams to ensure

design quality.


• Develop and maintain automation scripts (Python/TCL/Shell) to improve PD flows.


• Support sign-off processes using industry EDA tools (Synopsys, Cadence…).


• Participate in design reviews and prepare technical documentation.

2. Job Requirement


• 3+ years of hands-on experience in Physical Design for ASIC/SoC.


• Proficiency in PnR tools such as Cadence Innovus, Synopsys ICC2/Fusion

Compiler.


• Solid knowledge of:

o Floorplanning, power planning

o Placement & optimization

o CTS methodology

o Routing strategies

o STA (PrimeTime or Tempus)

o Physical Verification flows (Calibre, Pegasus)


• Strong understanding of timing/debug techniques, clocking concepts, and lowpower design.

Strong scripting skills in TCL, Python, Shell.


• Familiarity with Linux/Unix environment.


• Ability to work independently and take ownership of design blocks.


• Good communication and documentation skills (English required).

3. Benefit


• Attractive salary package based on experience + performance bonus.


• Work on international SoC/ASIC tape-out projects with senior experts.


• Full insurance package (based on full salary) and additional corporate benefits.


• Professional, dynamic, engineering-driven work environment.

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