Physical Design Engineer

2 weeks ago

Ho Chi Minh City, Ho Chi Minh, Vietnam Smart SP Vietnam Full time $20,000 - $60,000 per year

Smart SP is supporting our client in hiring a Physical Design Engineer, based in Ho Chi Minh City.

Responsibilities

  • Execute and own full Physical Design (PD) flow:
  • Work on block-level or chip-level PnR for SoC/ASIC designs.
  • Analyze and resolve timing challenges (setup/hold), congestion, power issues, IR drop, EM.
  • Optimize PPA (Performance – Power – Area) throughout design stages.
  • Collaborate closely with RTL, Verification, DFT, and Architecture teams to ensure design quality.
  • Develop and maintain automation scripts (Python/TCL/Shell) to improve PD flows.
  • Support sign-off processes using industry EDA tools (Synopsys, Cadence…).
  • Participate in design reviews and prepare technical documentation.

Qualifications

  • 3+ years of hands-on experience in Physical Design for ASIC/SoC.
  • Proficiency in PnR tools such as Cadence Innovus, Synopsys ICC2/Fusion Compiler.
  • Solid knowledge of: Floorplanning, power planning, CTS methodology, STA (PrimeTime or Tempus), Physical Verification flows (Calibre, Pegasus)
  • Strong understanding of timing/debug techniques, clocking concepts, and low-power design.
  • Strong scripting skills in TCL, Python, Shell.
  • Familiarity with Linux/Unix environment.
  • Ability to work independently and take ownership of design blocks.
  • Good communication and documentation skills (English required).

Benefit

  • Attractive salary package based on experience + performance bonus.
  • Work on international SoC/ASIC tape-out projects with senior experts.
  • Full insurance package (based on full salary) and additional corporate benefits.
  • Professional, dynamic, engineering-driven work environment.
  • Company trips, team building, training support.

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