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Design & Verification Engineer
5 days ago
**Mô tả công việc**:
(Mức lương: Đến 20 triệu VNĐ)
Input the specifications requested by the customer, and carry out specific design verification work using the following languages.
・Function specifications (English)
・Mounting specifications (English)
・RTL (Verilog/SystemVerilog) or high-level synthesis (SystemC/C/C++)
・Verification strategy (English)
・Verification item table (English)
・Verification environment construction/verification scenario (SystemVerilog/SVA/UVM/C)
・Verification environment manual (English)
・Verification result report (English)
**Chức vụ**: Nhân Viên/Chuyên Viên
**Hình thức làm việc**: Toàn thời gian
**Quyền lợi được hưởng**:
・Raise in salary (April)
・Bonus 3 times (Summer, Winter, Tet bonus) 3 months bonus
・Position allowance
・IT Admin allowance(1,500,000VND/month)
・Lunch allowance(1,000,000VND/month)
**Yêu cầu bằng cấp (tối thiểu)**: Đại Học
**Yêu cầu công việc**:
<Must>
・+3 years experience for same position
・Skill for Verilog
<Prefer>
・Skill for System Verilog
・Skill for Synopsys or Cadence
**Yêu cầu giới tính**: Nam/Nữ
**Ngành nghề**: CNTT - Phần Cứng,CNTT - Phần Mềm,Data Analytics,Phần Cứng Máy Tính/Điện Thoại
Đại Học
3 - 5 năm
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