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Physical Design Lead
3 weeks ago
**Job summary**:
Job level: Technical Lead
Direct report: Manager
Location: HCM or Da Nang
**Responsibilities**:
**Job Overview**:
- Work with design teams across various disciplines in helping them take their blocks (custom, PnR) and making sure all the blocks meet physical requirements.
- Implement/Support blocks with multi-voltage designs through all aspects of RTL to GDS.
- Implementation (Place and Route, static timing, physical verification) using industry standard EDA tools.
- Work with architects, logic designers and ASIC vendors to drive architectural feasibility studies, develop timing, power and area design targets, and explore RTL/design tradeoffs for physical design closure.
- Hands on experience and a solid understanding in all of the following physical design flows and methodologies: Synthesis/PnR, power/EM/IR analysis, power intent (UPF/CPF).
**Experience requirements**:
Qualifications:
- 7+ years of experience running an industry standard EDA tool for full chip assembly and Physical Verification (LVS/DRC) is required.
- Experience in tape-outs of high performance SOC is required.
- Understanding of several timing-related concepts is extremely desirable: setup, hold, clocking, timing corners, timing constraints, noise, and process variation.
- Physical design knowledge, from netlist handoff to GDS tape out including floor planning, place and route, clock tree synthesis, timing closure and physical verification.
- Work with logic verification, and software teams to understand and implement the design requirements for clocking and power management.
- Knowledge of scripting languages such as Perl/TCL is required.
- Diligent, detail-oriented, and should be able handle delegation of assignments efficiently.
- Must possess effective communication skills, self-driven individual and a good team player.
**Education requirements**:
- Bachelors or master’s degree in electrical-Electronic Engineering or Computer Engineering.
**Contact Person**:
Toan Chu
Adecco
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