SOC Engineering, Engineer

49144BR - VIETNAM - Ho Chi Minh **Job Description and Requirements** **Opportunities** - Offer professional, innovative, fair and fun working environment. Strong culture company. - Competitive salary and benefit. Strong support from company for health: Insurance, Sport clubs: Football, Ping-Pong, Badminton, Yoga, Zumba - Strong support from company for...

As a Physical Design Static Timing Analysis / STA Engineer, your will:Perform static timing analysis (STA) and timing optimization, generate and verifies timing constraints, performs SI/Noise analysis, and fixes timing & noise violations at full chip/block level for SoCs. Utilize understanding of Design for Test for timing analysis and constraints. Develop...

49144BR VIETNAM Ho Chi MinhJob Description and RequirementsOpportunities Offer professional, innovative, fair and fun working environment. Strong culture company. Competitive salary and benefit.Strong support from company for health:Insurance, Sport clubs: Football, Ping-Pong, Badminton, Yoga, Zumba Strong support from company for team building, social...

Curious to know how Intel designers enable test or debug capability on our chip?Join us for an exciting career in Malaysia Design Center Chipsets Design Team as a SoC Design Engineering Graduate Trainee. In this position, you will have the opportunity to design, develop and validate the Chipsets and SoC IPs for Intel latest product. You will have the...

Semiconductor industry - SoC Design Verification Senior Engineer - Attractive salary package and benefit **Main Responsibilities** - IP/SOC design verification - Review the IP/SOC specification and architecture - Design verification methodology and flow implementation and improvement. - Extract the features and define the verification plan - Execute on the...

Curious to know how Intel designers enable test or debug capability on our chip?Join us for an exciting career in Malaysia Design Center Chipsets Design Team as a SoC Design Engineering Graduate Trainee. In this position, you will have the opportunity to design, develop and validate the Chipsets and SoC IPs for Intel latest product. You will have the...

Semiconductor industry SoC Design Verification Senior Engineer Attractive salary package and benefitMain Responsibilities IP/SOC design verification Review the IP/SOC specification and architecture Design verification methodology and flow implementation and improvement. Extract the features and define the verification plan Execute on the verification plan...

49957BR VIETNAM Ho Chi MinhJob Description and RequirementsJob Description and RequirementsIn this role you will be responsible for digital implementation from RTL to GDSII, which includes the following stages:Gate level netlist synthesis Physical implementation Static Timing Analysis EMIR Physical verification SignoffKey Qualifications Requires a Bachelor's...

Performs physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing. - Conducts all aspects of the physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise...

Performs physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing. - Conducts all aspects of the physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise...

As a Pre-silicon Verification Engineer, you are required to: - Develop and document test plan and test sources. Ensure all the RTL Design being validated well to eliminate design flawless to customer. - Perform test verification and enhancement to ensure design quality and robustness. - Drive test review with counterparts such as Pre-Silicon SoC, IP design,...

As a Physical Design Static Timing Analysis / STA Engineer, your will: - Perform static timing analysis (STA) and timing optimization, generate and verifies timing constraints, performs SI/Noise analysis, and fixes timing & noise violations at full chip/block level for SoCs. - Utilize understanding of Design for Test for timing analysis and constraints. -...

Committed and passionate about technical work Should be able to work independently and able to guide others The role requires this person to be the point of contact for handling and resolving technical queries for other engineers in the team. **Yêu cầu công việc**: Worked on SoC level testbench and verification environment Testbench architecture,...

As a Pre-silicon Verification Engineer, you are required to:Develop and document test plan and test sources. Ensure all the RTL Design being validated well to eliminate design flawless to customer. Perform test verification and enhancement to ensure design quality and robustness. Drive test review with counterparts such as Pre-Silicon SoC, IP design,...

**Mô tả công việc**: (Mức lương: 35 - 85 triệu VNĐ) - Committed and passionate about technical work - Should be able to work independently and able to guide others - The role requires this person to be the point of contact for handling and resolving technical queries for other engineers in the team. **Chức vụ**: Nhân Viên/Chuyên...

**Mô tả công việc**:(Mức lương: Thỏa thuận) At Synopsys, SOC, System Design Solutions, we are at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. In addition to the traditional EDA...

Mô tả công việc:(Mức lương: Thỏa thuận) At Synopsys, SOC, System Design Solutions, we are at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. In addition to the traditional EDA...

Define DFT methodology, architecture and implementation strategies for FPGA SoC. - Develop DFT HAS, Scan config file, MBIST insertion file, DFT timing spec, and various DFT scripts and flows. - Perform pre-silicon Scan insertion, DFT Timing review, DV test plan and waveform review, Scan ATPG and Scan simulations and assist to bring post-silicon ATPG and...

Define DFT methodology, architecture and implementation strategies for FPGA SoC. - Develop DFT HAS, Scan config file, MBIST insertion file, DFT timing spec, and various DFT scripts and flows. - Perform pre-silicon Scan insertion, DFT Timing review, DV test plan and waveform review, Scan ATPG and Scan simulations and assist to bring post-silicon ATPG and...

International company - Full flow IC Design - New project in Vietnam **CHARACTERIZATION ENGINEER** Responsible for electrical characterization / evaluation of SoC device - Specify evaluation methods and plan for testing SoC device - Define the requirement for test patterns / test programs for ATE suites - Communicate engineers who provides test patterns /...