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Digital Ic Verification Engineer
1 week ago
(Mức lương: Thỏa thuận)
- Design VIP and Develop verification environment for IP and SOC level using UVM methodology.
- Create and debug test cases and Verification IP
- Use assertion based verification to verify module or SOC level.
- Perform code coverage analysis on module and SOC level
**Chức vụ**: Nhân Viên/Chuyên Viên
**Hình thức làm việc**: Toàn thời gian
**Quyền lợi được hưởng**:
- Chế độ bảo hiểm
- Du Lịch
- Chế độ thưởng
- Chăm sóc sức khỏe
- Đào tạo
- Tăng lương
**Yêu cầu bằng cấp (tối thiểu)**: Đại Học
**Yêu cầu công việc**:
- 2years or above experience in the area of digital IC verification.
- Familiar with UNIX, well knowledge in RTL integration
- Experience in system Verilog and UVM verification methodology
- Experience in using EDA tools from Cadence, Synopsys
**Yêu cầu giới tính**: Nam/Nữ
**Ngành nghề**: C/C++,CNTT - Phần Mềm,Data Analytics
Đại Học
Không yêu cầu
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