Digital Design Engineer

2 weeks ago

Ho Chi Minh City, Ho Chi Minh, Vietnam Marvell Full time
About Marvell

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.


At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow.

For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact


Marvell is a leading provider of innovative storage technologies, including ultra-fast read channels, high-performance processors, leading-edge transceivers, highly efficient analog designs, and powerful cryptographic engines.

These solutions address all segments of the hard disk drive (HDD) and solid-state drive (SSD) electronics markets.

Many of the same technologies have been utilized in Marvell storage system solutions products, powering PCs, servers, cloud, and enterprise systems.

What You Can Expect

  • Work with IP/SoC architecture to study design feasibilities meeting PPA requirements.
  • Create Microarchitecture specification (MAS), perform RTL coding based on MAS using best RTL coding practices, and integrate the RTL
into the IP/SoC.

  • Work with the verification team to define testplan, debug/fix failures, analyze coverage.
  • Define verification strategy and do verification to make sure verification closure.
  • Cooperate with Synthesis, DFT, STA, PnR teams to solve issues related to incharged IP.
  • Support Emulation, FPGA prototype, functional ATE, and silicon validation teams.
What We're Looking For

  • Degree in Computer Science, Electrical Engineering, or related fields and 8+ years of related professional experience. Less experienced
  • Proven track record of digital IP design from concept to successful ASIC/SoC project TOs.
  • Familiar with digital IC design methodologies, understand all stages of ASIC design flows, and experienced EDA tools.
  • Handson behavioral and RTL coding experience, Verilog/SV preferred.
  • Handson verification different abstract levels including block, IP and SoC
  • Strong knowledge of verification methodology, logic synthesis and timing analysis.
  • Good at documentation and communication skills using English.
  • Experiences in UVM verification methodology is a plus
  • Experiences in PCIe/DDR/SRAM/NVMe/DMA/Security/RISC-V IP is a big plus.
  • Experiences in USB/SAS/SATA IP, ARMbased SoC, Emulation, FPGA is a plus.
Job Responsibilities

  • Work with IP/SoC architecture to study design feasibilities meeting PPA requirements.
  • Create Microarchitecture specification (MAS), perform RTL coding based on MAS using best RTL coding practices, and integrate the RTL
into the IP/SoC.

LI-UN1

Additional Compensation and Benefit Elements


With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity.

We're dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us.

For additional information on what it's like to work at Marvell, visit our

Careers

page.


All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

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