Principal Engineer, System Design and Validation

About Marvell
Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact
As a hardware and silicon validation principal engineer at Marvell, you'll be helping to deliver high bandwidth over long distances. This team performs analog validations on amplifiers that drive optical electronic devices and receivers. We also validate silicon photonics, do upper electronic measurements and support the coherent digital signal programming unit. This is a niche area at Marvell, working with cutting edge technologies used by many internal and external customers around the world.

OR

Signal Integrity Principal Engineer to contribute to the development of board, packages, and chip designs used in data center and AI infrastructures. The results of our innovative designs have made our products best in class for coherent long-haul and metro systems as well as PAM4 data center systems.

What You Can Expect
Candidate can work on Hardware Validation or SI/PI:

Hardware Validation

• Lead protocol characterization, develop characterization boards, and manage validation activities. Act as liaison between AE and validation teams, supporting local lab activities.
• Bring strong verification and validation knowledge, and collaborate with R&D, Field Engineering, and Product Marketing. Assist in design tool benchmarking and design flow maintenance.
• Create and drive validation plans for programs, mentor validation engineers, and ensure goal achievement.
• Validate Analog and DSP SerDes blocks (PLL, ADC/DAC, equalizers, drivers) and define methodologies for high-speed serial I/O measurements.
• Develop protocol-specific use models and conduct compliance tests. Create firmware functions for PHY design and evaluate characterization boards.
• Support development teams during bring-up, providing application engineering support to customers and FAEs.
• Answer customer questions, debug issues, create demo kits, and author application materials (GUIs, notes, guides).
• Lead validation plan development, review test plans, and prepare internal test result documents.
• Work with Design, Firmware, and Validation teams to resolve bugs and guide validation professionals.
• Contribute to validation strategies, validate Marvell products, and foster a culture of innovation and accountability.
• Ensure effective communication and collaboration with teams in the U.S. and globally.

Signal integrity (SI) and Power integrity (PI)

• Propose, review PCB stack-up, layer assignments, and layout for high-speed routing and PDN optimization.
• Perform SI/PI simulations for high-speed interfaces and power delivery networks (PDN), including pre-layout and post-layout analysis.
• Develop and execute guidelines, checklists, and constraints for SI/PI performance during schematic and PCB layout phases.
• Collaborate with hardware, package, and layout teams to optimize design based on simulation data or measurement feedback.
• Conduct hands-on validation including high-speed signal measurements, de-embedding, material characterization, and correlation to simulation.
• Analyze and guide mitigation for issues such as crosstalk, return loss, jitter, EMI, and power supply noise.
• Support root cause analysis and design updates based on lab measurements and field issues.
• Document analysis methodology, design guidelines, simulation processes and lesson learned.

What We're Looking For
Hardware Validation Requirements:

• BSEE/MSEE or Ph.D. in Electrical Engineering with 10+ years in system hardware design, IC validation, debugging, compliance testing, and performance evaluation.
• 8+ years in silicon validation, including SERDES and high-speed interfaces. At least 3 years as a project lead or 2 years in engineering management.
• Hands-on experience with high-speed multi-lane SERDES and ADC testing. Strong understanding of performance parameters, test platforms, and validation plans. Familiarity with protocols like PCI-Express, 10GBASE-KR, 25-200GBASEKR, CPRI, and CEI-56G.
• Proficiency in C++, Python, and Matlab. Experience with lab equipment (oscilloscopes, function generators, spectrum analyzers) and automated control (GPIB/488).
• Communication fundamentals, Signal Integrity, wireline communication theory, and high-speed I/O components. Experience with ADS/Matlab and electro-optical systems is a plus.
• Strong communication, teamwork, and problem-solving abilities.
• Proven leadership, and motivated to work in a global team environment.
• Fluent in English.

SI/PI Requirements

• Bachelor's degree in electrical/electronic Engineering or a related field with 3+ years of relevant industry experience; or a Master's/Ph.D. with 2+ years of experience and a demonstrated track record in SI/PI design and analysis.
• Solid understanding of transmission line theory and power delivery network (PDN) fundamentals.
• Strong knowledge of PCB design rules, materials, stack-up, DFM/DFA, and assembly considerations.
• Proficiency in using 2D and 3D electromagnetic simulation tools, including Ansys HFSS, SIwave, Cadence Clarity, and PowerSI, for modeling of high-speed interfaces (e.g., 112G SerDes, PCIe Gen5+), PCB structures, packages, and substrates.
• Hands-on experience with DC IR drops and PDN analysis and optimization using tools such as Cadence Sigrity, PowerDC, PowerSI, or ANSYS SIWAVE, etc.
• Competence in s-parameter extraction for high-speed component structures, PDN and conducting post-layout simulation in both frequency and time domains.
• Experience with circuit simulation tools like Keysight ADS and HSpice.
• Strong communication and documentation skills, with the ability to work across disciplines including hardware design, PCB layout, packaging, analog/digital design, marketing, and manufacturing vendors.
• Familiarity with measurement tools and methodologies including VNA and TDR for board-level characterization is a plus.
• Scripting ability in Python, TCL, or similar languages to automate SI/PI workflows is a plus.

Additional Compensation And Benefit Elements
With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We're dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it's like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Interview Integrity
As part of our commitment to fair and authentic hiring practices, we ask that candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-taking bots) during interviews.
Our interviews are designed to assess your personal experience, thought process, and communication skills in real-time. If a candidate uses such tools during an interview, they will be disqualified from the hiring process.
This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.