Memory Layout Design Engineer

**Alternate Job Titles**: - Memory Layout Design Senior Engineer - Senior Layout Engineer - Embedded Memory Layout Senior Engineer **We Are**: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design,...

Our team is looking for an experienced Memory Layout Design Engineer who plays a critical role in layout design for various foundation IPs, especially TCAM IP. **Responsibilities**: In the role of a Senior Layout design engineer, you will take the responsibility to: - Design, develop and modify layout design for Embedded Memory IPs, Standard Cells, IOs -...

**Alternate Job Titles**: - Senior Layout Design Engineer - Senior IC Layout Engineer **We Are**: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the...

**Synopsys delivers leading silicon to systems design solutions that maximize our customers’ R&D capability and productivity. Companies trust Synopsys to pioneer new technologies getting them to market faster without compromise.** **Position**: Foundation IP Layout Engineer **Level**:Senior **_Get to know more about Synopsys Foundation IP:_**_ _Logic...

**Alternate Job Titles**: - Memory Layout Design Senior Engineer - Senior Layout Engineer - Embedded Memory Layout Senior Engineer **We Are**: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design,...

50247BR - VIETNAM - Ho Chi Minh **Job Description and Requirements** Our team is looking for an experienced Memory Layout Design Engineer who plays a critical role in layout design for various foundation IPs. **Responsibilities**: In the role of a Senior Layout design engineer, you will take the responsibility to: - Design, develop and modify layout...

**Responsibilities** - Study and perform physical verification deck QA - Co-operate with circuit/layout team to define layout and QA methodologies for enhancing effectiveness and design quality - Perform physical verification (LVS/DRC/ERC/EMIR) - Ensure the database fully compliant with all requirements of tape-out flow - Work with other engineers to achieve...

**Description** - Cell & block level layout, macro planning, and interconnect - Physical verification (LVS, DRC, ERC, EMIR) - Actively participate in layout QA methodology and QA system improvement - Cooperate with designers for optimal Performance, Power, and Area (PPA) - Provide mentorship and guidance to junior engineers **Requirement** - Familiar with...

**Responsibilities** - Cell & block level layout, macro planning and interconnect - Physical verification (LVS, DRC, ERC, EMIR) - Actively participate in layout QA methodology and QA system improvement - Cooperate with designers for optimal Performance, Power and Area (PPA) - Provide mentorship and guidance to junior engineers **Requirements**: - Familiar...

50140BR - VIETNAM - Ho Chi Minh **Job Description and Requirements** **Position: Foundation IP Layout Engineer (Junior/Fresh Graduates)** **Responsibility**: - Designs, develops and modifies layout design (Physical custom design for Memory IPs, Standard Cells, IOs) - Provide support and/or perform other duties as assigned and required **Authority**: -...

1. Description - Cell & block level layout, macro planning, and interconnect - Physical verification (LVS, DRC, ERC, EMIR) - Actively participate in layout QA methodology and QA system improvement - Cooperate with designers for optimal Performance, Power, and Area (PPA) - Provide mentorship and guidance to junior engineers 2. Requirement - Familiar with...

**We Are**: At Synopsys, we drive innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration. Join us to transform the future through continuous technological innovation. **You Are**: You are a...

**Job Title**: Layout Design, Sr Engineer. **Location**: VN04 Ho Chi Minh **Experience & skills**: Minimum of 2 years of memory design or customer compiler... Ability to work in a fast-paced environment. Willingness to learn and adapt to new technologies. Strong problem-solving, and teamwork skills.

**Description** - Design, Optimization and Verification of IP Memory Compiler - Design include High-speed, High-density or Low-Power variant - Actively participate in design methodology and QA system improvement - Cooperate with Layout and CAD engineers for optimal schedule - Assist test-chip team in silicon verification and provide silicon validation...

**Alternate Job Titles**: - ** R&D Senior Engineer**: - ** Memory Design Senior Engineer**: - ** Embedded Memory Senior Engineer**: - ** Circuit Design Senior Engineer** **We Are**: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to...

**Description** - Design, Optimization and Verification of IP Memory Compiler - Design include High-speed, High-density or Low-Power variant - Actively participate in design methodology and QA system improvement - Cooperate with Layout and CAD engineers for optimal schedule - Assist test-chip team in silicon verification and provide silicon validation...

**Responsibilities** - Design, Optimization and Verification of IP Memory Compiler - Design include High-speed, High-density or Low-Power variant - Actively participate in design methodology and QA system improvement - Cooperate with Layout and CAD engineers for optimal schedule - Assist testchip team in silicon verification and provide silicon validation...

**Responsibilities** - Design, optimization and verification of IP memory compiler - Design including high-speed, high-density or low-power variant - Actively participate in design methodology and QA system improvement - Cooperate with layout and CAD engineers for optimal schedule - Assist testchip team in silicon verification and provide silicon validation...

**Responsibilities** - Responsible for layout floor-planning, hierarchical layout assembly, custom cell design, optimizing, and ect. - Create, verify, and modify custom CMOS integrated circuit layouts, as directed by design engineers - Plan place and route architecture - Perform physical verification: DRC, LVS and Antenna - Prepare presentation documents for...

**1. Description** Design, Optimization and Verification of IP Memory Compiler Design include High-speed, High-density or Low-Power variant Actively participate in design methodology and QA system improvement Cooperate with Layout and CAD engineers for optimal schedule Assist test-chip team in silicon verification and provide silicon validation...