13. Junior Memory Layout Design Enginee

2 months ago


Ho Chi Minh City, Vietnam Faraday Technology Corporation Full time

**Responsibilities**
- Responsible for layout floor-planning, hierarchical layout assembly, custom cell design, optimizing, and ect.
- Create, verify, and modify custom CMOS integrated circuit layouts, as directed by design engineers
- Plan place and route architecture
- Perform physical verification: DRC, LVS and Antenna
- Prepare presentation documents for customers

**Requirements**:

- Bachelor/engineer or above in electrical engineering or relative major
- Good English communication skills
- Good communication skills, positive attitude, and team-work skills
- Self-learning ability



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