SOC Physical Design Engineer
2 weeks ago
**Responsibilities**
- ASIC physical implementation by using automatic place and route tools
- Floor planning, powerplan synthesis, clock tree synthesis, timing closure, routing, and post-route optimization
- Physical verification signoff including DRC, LVS, ERC, Antenna and ESD
- Coordinate cross-site communication and coordination among internal supporting groups
**Requirements**:
- Familiar with Cadence Innovus or Synopsys ICC flow
- Familiar with timing closure, IR drop analysis and physical verification
- Excellent team and interpersonal skills
- BS or MS degree in EE or CS related
- Good English communication skills
- Min 3 years working experience
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