Design Verification Intern
2 weeks ago
About Marvell
Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
What You Can Expect
- Read and understand Spec, create test plan and coverage plan.
- Study the existing coverage group definition, and test cases, write new testcases, constraint randomized testcases to enhance coverage
- Running simulation and understand the block design operation and debug
- Coverage improvement and closure
- Contribute to the improvements on DV strategy, flow, tool scripts
What We're Looking For
- Currently pursuing a Bachelor's degree in Electrical Engineering, Computer Engineering or Electrical & Computer Engineering
- Cumulative 3.2/4.0 GPA or higher
- Familiar with Verilog and SystemVerilog, preferably with UVM is a plus.
- Experience with scripting languages, e.g., Python or Perl and Linux working enviroment is a plus
- Good English
Additional Compensation and Benefit Elements
With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our
Careers
page.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
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