Dft Engineer Staff Level

3 months ago


Ðà Nẵng, Vietnam Synopsys Full time

**Job Descriptions**
- Define and implement DFT architecture of IP design
- Do SCAN insertion and ATPG simulation (with and without timing)
- Analyze and improve test coverage
- STA DFT timing constraints develop and analysis
- Make DFT integration guidelines to SoC level
- Complete all design quality checks and data quality checks
- Do FMEDA, DFMEA analysis and report.
- Locate in Da Nang

**Skills Requirements**:

- BS/MS/PhD in Electronics Engineering, Electromechanics, Telecommunications.
- 5+ years of experience in DFT design
- Strong knowledge of DFT architectures & methodologies which includes Scan insertion, ATPG, JTAG, etc
- Have knowledge in FUSA, ISO26262, FMEDA, DFMEA is a big plus
- Strong debug skills and demonstrated experiences in Perl /TCL/Python scripting is a plus
- Strong skill with design tools: Synopsys Design Compiler, VCS, Formality, TetraMAX
- Design experience in MBIST ,LBIST and Analog DFT is an added advantage.
- Highly responsible, result oriented
- Good English communication both verbally and in writing
- Great team player, willing to support others
- Self-motivated and highly enthusiasm in technology and solving problems



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