R&d Engineer, Sr I

4 days ago

Ho Chi Minh City, Vietnam Synopsys Full time

42438BR
- VIETNAM - Ho Chi Minh

**Job Description and Requirements**
- At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.
- Circuit Engineer, Senior/ Manager MRAM/ TCAM
- We're looking for Circuit Design Engineer, Senior/ Manager to join our team.
- Does this sound like a good role for you?**Responsibilities**:

- Develop CMOS special memories such as MRAM, TCAM, BCAM, multi ports SRAM:

- Design architecture and circuit implementation, especially ultra high speed, ultra low power, or high density design portfolio.
- Perform schematic entry, circuit simulation, layout planning, layout supervision, design verification and validation.
- Interface with CAD and Frontend engineers for memory compiler automation, EDA model generation and full verification flow.
- Perform bitcell development and verification, and drive physical layout design and verification.
- Provide support and/or perform other duties as assigned and required.

Authority:

- Build and develop memory compiler with best PPA in class:

- Schedule own working flow.
- Normally receives little instruction on day-to-day work, general instructions on new assignments.
- Demonstrates good judgment in selecting methods and techniques for obtaining solutions.
- To be trained so as understand full design cycle.
- To be trained to become smart manager.

Skills Requirements:

- Bachelor’s or Master’s degree, Electrical Engineering, Telecommunication or related fields.
- 5+ years’ experience in embedded CMOS memory development at advanced technology nodes.
- Hands-on embedded memory design flow: Architecture, circuit design, physical implementation, compiler automation, characterization, timing and model generation.
- Bit cells design, failure analysis, memory testing methodology and strong data analysis skills.
- Proficient with CMOS memory design, circuit simulation, memory layout designs, layout parasitic extraction and knowledge of layout verification tools and debugging techniques.
- Experience in depth analysis on memory bit cell read/write/hold margin and reliability risk.
- Programming capability
- C-Shell, Perl. C++ or Java script a plus.
- Excellent analytical and problem solving skills along with attention to details.
- Can develop a document, report or presentation for a range of tasks.
- Microsoft Office: Word, Excel, PowerPoint, Shared point and Outlook.
- Self-motivated, self-directed, detailed oriented and well organized.
- Good analytical, problem solving and negotiation skills.
- Ability to manage/mentor trainees and junior engineers as well as manage projects.
- An excellent command of English both verbal and written.
- Excellent interpersonal communication and team working skills.
- Professionalism, Critical/Logical thinking, future goals focused.
- High commitment to continuous learning.

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.

**Job Category**
- Engineering

**Country**
- Viet Nam

**Job Subcategory**
- R&D Engineering

**Hire Type**
- Employee

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