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Senior/ Staff Engineer
2 months ago
Responsibilities:
Be responsible for verification quality of IP and SoC modulesExecute verification tasks and test suites based on design specificationAnalyze simulation and regression resultsSupport and work closely with Digital Verification leads on self-checking test benches using modern verification techniques based on System Verilog and UVM methodologySupport Digital Verification leads in defining new trends of verification methodologies and flows
Experience Requirements:
At least 3-5 years of work experience in digital verification within the semiconductor industryProven knowledge of System Verilog and UVM, VHDL or Verilog – Formal verification would be plusHave good programming skills, e.g., in C++, Python or Perl, as well as good Linux skillsGood communication in English language
Education Requirements:
A degree in Electrical Engineering, Information Technology or comparable with focus on electronics Please click the APPLY button or contact Ms. Phuong Nguyen at or to discuss further
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