Dft - Design for Test
2 weeks ago
Responsibilities:
- Deep submicron ASIC) Test Strategy planning and Design verification work
- SCAN, MBIST implementation
- HIP Test method design of work
- LBIST/POST such as the Automotive DFT feature
- DFT Implementation and Diagnosis
- Chip DFT architecture implementation
- Logic
DFT:
SCAN architecture configuration, ATPG, and Diagnosis
- Memory
DFT:
BIRA/BISR, BIST, and Diagnosis
- DFT for Analog IP, Special IO, and Automotive device
- DFT design verification
Experience requirements:
Preference is given to those with experience in product development of more than 100 million units in mass production
Education requirements:
Contact Person:
Vi Nguyen
Adecco
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