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Design Verification Lead/Manager
2 weeks ago
Design Verification Lead/Manager
Experience
8+ years
Work Type
On site
Work Location
Singapore
Salary (Open to discuss)
Negotiable
Overview
We are searching for Design Verification level Lead/ Manager to work onsite in Singapore.
Description
· Collaborate with the design team to understand and define verification requirements for
high-speed, low power digital circuit designs from definition to implementation.
· Own and be involved in all aspects of the functional verification from initial test planning, test
creation and debug. to coverage and sign-off closure.
· Own and implement verification of high speed, low power digital designs at IP and System level
using both coverage driven constraint random and directed testing techniques as well as formal
verification.
· Own and implement test benches and components such as test and sequence libraries, moni-
tors, models and BFMs by applying object oriented programming verification techniques follow-
ing UVM methodology.
· Work independently on various DV tasks and provide technical guidance to the DV team, or even
lead a big DV task inside a team or cross team.
Requirements
THE PERSON:
· Strong analytical and problem-solving skills with a pronounced attention to details.
· Strong communication, mentoring and leadership skills.
· Skilled at driving team and tasks from start to completion with superior quality.
· Can work well with cross functional teams.
. Good skills of English communication.
TECHNICAL:
· From 8 years of total experience, working with functional verification, advanced knowledge of
ASIC/SOC Design flow and state of the art verification flow.
. Experience leading a team (from 5 members).
. Proficient with Verilog, System Verilog and UVM.
· Good in UVM concepts and SystemVerilog language. (SVA, UVM scoreboard).
· Good in defining and developing UVM based verification frameworks, testbenches, processes
and flows.
· Good at working in Linux and Windows environments.
· Familiarity with power aware simulation and firmware/hardware co-verification is a plus.
· Familiarity with industry standard interconnects such as AMBA (AXI, APB, AHB) is a plus.
· Strong analytical and problem-solving skills with pronounced attention to detail.
· Scripting language experience: Perl, Ruby, Makefile, shell is a plus.
· Automating workflows in a distributed compute environment.
· Capable of independently driving tasks and activities to completion in an organized and timely
manner with excellent quality.
ACADEMIC CREDENTIALS:
. Major in EE, CS or related, Master's Degree with 5+ years or Bachelor's with 8+ years working
experiences.
Interview Process
Round 1: Technical assessment
Round 2: Culture
