Staff Digital Design Engineer

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

Marvell is a leading provider of innovative storage technologies, including ultra-fast read channels, high-performance processors, leading-edge transceivers, highly efficient analog designs, and powerful cryptographic engines. These solutions address all segments of the hard disk drive (HDD) and solid-state drive (SSD) electronics markets. Many of the same technologies have been utilized in Marvell storage system solutions products, powering PCs, servers, cloud, and enterprise systems.

Marvell Vietnam is one of Marvell Research and Development (R&D) centers. We are seeking talented engineers to join our ASIC Development team and work with the most advanced technologies in IC design.

What You Can Expect
- Work with IP/SoC architecture to study design feasibilities meeting PPA requirements.
- Create Micro-architecture specification (MAS), perform RTL coding based on MAS using best RTL coding practices, and integrate the RTL

into the IP/SoC.
- Work with the verification team to define test-plan, debug/fix failures, analyze coverage.
- Define verification strategy and do verification to make sure verification closure.
- Cooperate with Synthesis, DFT, STA, PnR teams to solve issues related to in-charged IP.
- Support Emulation, FPGA prototype, functional ATE, and silicon validation teams

What We're Looking For
- Proven track record of digital IP design from concept to successful ASIC/SoC project TOs.

Familiar with digital IC design methodologies, understand all stages of ASIC design flows, and experienced EDA tools.
- Hands-on behavioral and RTL coding experience, Verilog/SV preferred.
- Hands-on verification different abstract levels including block, IP and SoC
- Strong knowledge of verification methodology, logic synthesis and timing analysis.
- Good at documentation and communication skills using English.
- Experiences in UVM verification methodology is a plus
- Experiences in PCIe/DDR/SRAM/NVMe/DMA/Security/RISC-V IP is a big plus.
- Experiences in USB/SAS/SATA IP, ARM-based SoC, Emulation, FPGA is a plus.

Additional Compensation and Benefit Elements- Competitive salary, plus 13th-month salary and performance-based bonus- RSUs (Restricted Stock Units) for new joiners and on-going annually- Premium health & accident insurance for you and your family (spouse and children)- Annual medical check-up at a designated hospital arranged by Marvell- Generous paid leave policies: 15 annual leave days, 3 Recharge periods per year (company-wide off-work from Friday to Monday), 5 paid sick leave days, 3 days of volunteer time-off and 11 public holidays- Exciting Employee Events: Participate in fun activities throughout the year such as team birthdays, sports tournaments, company trips, mid-autumn, appreciation week, charity, health seminars, year-end party, and more.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

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