Asic Physical Design Engineer, Staff
2 months ago
The Synopsys Mixed-Signal IP organization seeking a highly motivated individual responsible for the physical implementation of complex Mixed signal IPs and test chips across multiple process technologies.
**We’re looking for a Physical Design Implementation Engineer to join the team.**
Does this sound like a good role for you?
In this role, you will be responsible for the Physical implementation of high speed interface IPs and test-chips, driving all aspects from RTL to GDS including timing and physical sign-off, in close interaction and collaborative team work with multiple functional groups (front end, analog, CAD) and the product team.
**Key Qualifications**
- MSEE, w/ 8 + years of physical design experience with recent contribution to project tape-outs.
- Has intimate knowledge of the full design cycle from RTL to GDSII, including chip level.
- Has solid engineering understanding of the underlying concepts of IC design, implementation flows and methodologies for deep submicron design.
- Has good communication skills, ability to think and communicate at different levels of abstraction with peer groups.
- Must demonstrate knowledge of the Synopsys tools, flows and methodologies required to execute physical design projects. These tools may include: Design Compiler, Physical Compiler, Primetime SI, ICC, Star-RCXT, Hercules, HSPICE and other tools.
- Has good software and scripting skills (Perl, Tcl, Python); knowledge of CAD automation methods.
- Autonomous, timely decision maker and able to cope with interrupts.
Synopsys delivers the most trusted and comprehensive silicon to systems design solutions, accelerating technology innovation. We partner closely with our customers to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. Companies trust Synopsys to pioneer new technologies to help them get to market faster without compromise.
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