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Principal Engineer, Hardware Validation

1 month ago

Thành phố Hồ Chí Minh, Vietnam Marvell Full time

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

As a hardware and silicon validation principal engineer at Marvell, you’ll be helping to deliver high bandwidth over long distances. This team performs analog validations on amplifiers that drive optical electronic devices and receivers. We also validate silicon photonics, do upper electronic measurements and support the coherent digital signal programming unit. This is a niche area at Marvell, working with cutting edge technologies used by many internal and external customers around the world.

What You Can Expect
- Lead protocol characterization, develop characterization boards, and manage validation activities. Act as liaison between AE and validation teams, supporting local lab activities.
- Bring strong verification and validation knowledge, and collaborate with R&D, Field Engineering, and Product Marketing. Assist in design tool benchmarking and design flow maintenance.
- Create and drive validation plans for programs, mentor validation engineers, and ensure goal achievement.
- Validate Analog and DSP SerDes blocks (PLL, ADC/DAC, equalizers, drivers) and define methodologies for high-speed serial I/O measurements.
- Develop protocol-specific use models and conduct compliance tests. Create firmware functions for PHY design and evaluate characterization boards.
- Lead validation plan development, review test plans, and prepare internal test result documents.
- Work with Design, Firmware, and Validation teams to resolve bugs and guide validation professionals.
- Contribute to validation strategies, validate Marvell products, and foster a culture of innovation and accountability.
- Ensure effective communication and collaboration with teams in the U.S. and globally.

What We're Looking For
- BSEE/MSEE or Ph.D. in Electrical Engineering with 10+ years in system hardware design, IC validation, debugging, compliance testing, and performance evaluation.
- 8+ years in silicon validation, including SERDES and high-speed interfaces. At least 3 years as a project lead or 2 years in engineering management.
- Hands-on experience with high-speed multi-lane SERDES and ADC testing. Strong understanding of performance parameters, test platforms, and validation plans. Familiarity with protocols like PCI-Express, 10GBASE-KR, 25-200GBASEKR, CPRI, and CEI-56G.
- Proficiency in C++, Python, and Matlab. Experience with lab equipment (oscilloscopes, function generators, spectrum analyzers) and automated control (GPIB/488).
- Communication fundamentals, Signal Integrity, wireline communication theory, and high-speed I/O components. Experience with ADS/Matlab and electro-optical systems is a plus.
- Strong communication, teamwork, and problem-solving abilities.
- Proven leadership, and motivated to work in a global team environment.

Fluent in English.

Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our

Careers

page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

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